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Keysight Technologies (Agilent HP) 16715A (Timing and State Modules) Main Features and Specifications

Product Specs

  • Instrument Type Module
  • Max. Channels Number 68
  • Max. State Speed 167 MHz
  • Max. Timing Speed 667 MHz
  • Memory Depth 2M/ch
  • Status Discontinued
  • Supported until Nov-2008
  • Alternative 16760A, 16900

See also

The Agilent 16715A, 167 MHz state and 667 MHz timing logic analyzer module, offers high performance state and timing analysis features for your future digital designs. 2M of acquisition memory is available on each channel to capture the information you need to link the symptom of a problem with the cause. Utilizes Agilent'''''s breakthrough VisiTrigger™ technology.

  • VisiTrigger™ technology combines new trigger functionality with a user interface that is easy to use and understand -- its graphical representation shows you how the trigger condition will be defined.
  • Your most commonly used triggers are just a mouse click away with the built in trigger functions.
  • Both basic and advanced state and timing trigger functions are available.
  • Trigger functions can be combined as building blocks to easily customize a trigger for your specific task.
  • Each step in the sequence contains an "IF-THEN-ELSE" structure that can evaluate up to four logic events.
  • Each event can specify a combination of actions such as: store sample, increment counters, reset timers, trigger, or go to another step in the trigger sequence.
  • 167 MHz state speed
  • Up to 340, 2M deep channels simultaneously
  • Each module offers 68 channels with 2M memory depth per channel.
  • Half channel timing mode provides up to 4M memory depth per channel.
  • Connect up to five modules together for a 340 channel system.
  • Enhanced troubleshooting with a variety of display modes
  • Display your state and timing measurements as a listing, waveform, chart, or a distribution over time.
  • Markers placed in one display are automatically updated in the other display modes.
  • The Compare tool lets you perform a bit by bit comparison between acquired state and/or timing data and a reference trace.